Method and system for a feedback transimpedence amplifier with sub-40khz low-frequency cutoff

ABSTRACT

A sub-40 kilohertz low-frequency cutoff is provided for via a transimpedance amplifier comprising differential inputs and differential outputs; coupling capacitors comprising input terminals configured to receive electrical signals, and output terminals coupled to the differential inputs; and feedback paths coupled to the differential outputs and operable to level shift voltage levels at the input terminals. In some embodiments, the feedback paths comprise source follower transistors wherein the differential outputs are coupled to gate terminals of the source follower transistors or the feedback paths further comprise feedback resistors. In some embodiments, a bias resistor is coupled between the differential inputs.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of application Ser. No. 16/372,164filed on Apr. 1, 2019, which is a continuation of application Ser. No.15/251,955 filed on Aug. 30, 2016, which is a continuation ofapplication Ser. No. 14/305,733 filed on Jun. 16, 2014, which is acontinuation of application Ser. No. 13/926,851 filed on Jun. 25, 2013,now U.S. Pat. No. 8,754,711, which is a continuation of 13/175,545 filedon Jul. 1, 2011, now U.S. Pat. No. 8,471,639, which makes reference to,claims priority to and claims the benefit of U.S. Provisional PatentApplication No. 61/398,987 filed on Jul. 6, 2010. Each of the abovestated applications is hereby incorporated herein by reference in itsentirety.

FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT

[Not Applicable]

MICROFICHE/COPYRIGHT REFERENCE

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FIELD OF THE INVENTION

Certain embodiments of the invention relate to signal processing. Morespecifically, certain embodiments of the invention relate to a methodand system for a feedback transimpedance amplifier with sub-40 khzlow-frequency cutoff.

BACKGROUND OF THE INVENTION

As data networks scale to meet ever-increasing bandwidth requirements,the shortcomings of copper data channels are becoming apparent. Signalattenuation and crosstalk due to radiated electromagnetic energy are themain impediments encountered by designers of such systems. They can bemitigated to some extent with equalization, coding, and shielding, butthese techniques require considerable power, complexity, and cable bulkpenalties while offering only modest improvements in reach and verylimited scalability. Free of such channel limitations, opticalcommunication has been recognized as the successor to copper links.

Optical communication systems have been widely adopted for applicationsranging from internet backbone, local area networks, data centers,supercomputing, to high-definition video. Due to superior bandwidth andlow loss, optical fibers are the medium of choice for transportinghigh-speed binary data.

Further limitations and disadvantages of conventional and traditionalapproaches will become apparent to one of skill in the art, throughcomparison of such systems with the present invention as set forth inthe remainder of the present application with reference to the drawings.

BRIEF SUMMARY OF THE INVENTION

A system and/or method for a feedback transimpedance amplifier withsub-40 khz low-frequency cutoff, substantially as shown in and/ordescribed in connection with at least one of the figures, as set forthmore completely in the claims.

Various advantages, aspects and novel features of the present invention,as well as details of an illustrated embodiment thereof, will be morefully understood from the following description and drawings.

BRIEF DESCRIPTION OF SEVERAL VIEWS OF THE DRAWINGS

FIG. 1A is a block diagram of a photonically enabled CMOS chipcomprising a feedback transimpedance amplifier with sub-40 khzlow-frequency cutoff, in accordance with an embodiment of the invention.

FIG. 1B is a diagram illustrating an exemplary CMOS chip, in accordancewith an embodiment of the invention.

FIG. 1C is a diagram illustrating an exemplary CMOS chip coupled to anoptical fiber cable, in accordance with an embodiment of the invention.

FIG. 2 is a block diagram of an exemplary transimpedance amplifier, inaccordance with an embodiment of the invention.

FIG. 3 is a block diagram of an exemplary transimpedance amplifier withlow-frequency cutoff mitigation, in accordance with an embodiment of theinvention.

DETAILED DESCRIPTION OF THE INVENTION

Certain aspects of the invention may be found in a system for a feedbacktransimpedance amplifier with sub-40 khz low-frequency cutoff. Exemplaryaspects of the invention may comprise amplifying electrical signalsreceived via coupling capacitors utilizing a transimpedance amplifier(TIA) having feedback paths comprising source followers and feedbackresistors. The feedback paths may be coupled prior to the couplingcapacitors at inputs of the TIA. Voltages may be level shifted prior tothe coupling capacitors to ensure stable bias conditions for the TIA.The transimpedance amplifier may be integrated in a CMOS chip and thesource followers may comprise CMOS transistors. The TIA may receivecurrent-mode logic or voltage signals. The electrical signals may bereceived from a photodetector, which may comprise a silicon germaniumphotodiode and may be differentially coupled to the transimpedanceamplifier. The chip may comprise a CMOS photonics chip where opticalsignals for the photodetector in the CMOS photonics chip may be receivedvia one or more optical fibers.

FIG. 1A is a block diagram of a photonically enabled CMOS chipcomprising a feedback transimpedance amplifier with sub-40 khzlow-frequency cutoff, in accordance with an embodiment of the invention.Referring to FIG. 1A, there is shown optoelectronic devices on a CMOSchip 130 comprising optical modulators 105A-105D, photodiodes 111A-111D,monitor photodiodes 113A-113H, and optical devices comprising taps103A-103K, optical terminations 115A-115D, and grating couplers117A-117H. There are also shown electrical devices and circuitscomprising amplifiers 107A-107D, analog and digital control circuits109, and control sections 112A-112D. The amplifiers 107A-107D maycomprise transimpedance and limiting amplifiers (TIA/LAs), for example.

Optical signals are communicated between optical and optoelectronicdevices via optical waveguides 110 fabricated in the CMOS chip 130.Single-mode or multi-mode waveguides may be used in photonic integratedcircuits. Single-mode operation enables direct connection to opticalsignal processing and networking elements. The term “single-mode” may beused for waveguides that support a single mode for each of the twopolarizations, transverse-electric (TE) and transverse-magnetic (TM), orfor waveguides that are truly single mode and only support one modewhose polarization is TE, which comprises an electric field parallel tothe substrate supporting the waveguides. Two typical waveguidecross-sections that are utilized comprise strip waveguides and ribwaveguides. Strip waveguides typically comprise a rectangularcross-section, whereas rib waveguides comprise a rib section on top of awaveguide slab.

The optical modulators 105A-105D comprise Mach-Zehnder or ringmodulators, for example, and enable the modulation of thecontinuous-wave (CW) laser input signal. The optical modulators105A-105D comprise high-speed and low-speed phase modulation sectionsand are controlled by the control sections 112A-112D. The high-speedphase modulation section of the optical modulators 105A-105D maymodulate a CW light source signal with a data signal. The low-speedphase modulation section of the optical modulators 105A-105D maycompensate for slowly varying phase factors such as those induced bymismatch between the waveguides, waveguide temperature, or waveguidestress and is referred to as the passive phase, or the passive biasingof the MZI.

The phase modulators may have a dual role: to compensate for the passivebiasing of the MZI and to apply the additional phase modulation used tomodulate the light intensity at the output port of the MZI according toa data stream. The former phase tuning and the latter phase modulationmay be applied by separate, specialized devices, since the former is alow speed, slowly varying contribution, while the latter is typically ahigh speed signal. These devices are then respectively referred to asthe LSPM and the HSPM. Examples for LSPM are thermal phase modulators(TPM), where a waveguide portion is locally heated up to modify theindex of refraction of its constituting materials, or forward biased PINjunction phase modulators (PINPM) where current injection into the PINjunction modifies the carrier density, and thus the index of refractionof the semiconductor material. An example of an HSPM is a reversedbiased PIN junction, where the index of refraction is also modulated viathe carrier density, but which allows much faster operation, albeit at alower phase modulation efficiency per waveguide length.

The outputs of the modulators 105A-105D may be optically coupled via thewaveguides 110 to the grating couplers 117E-117H. The taps 103D-103Kcomprise four-port optical couplers, for example, and are utilized tosample the optical signals generated by the optical modulators105A-105D, with the sampled signals being measured by the monitorphotodiodes 113A-113H. The unused branches of the taps 103D-103K areterminated by optical terminations 115A-115D to avoid back reflectionsof unwanted signals.

The grating couplers 117A-117H comprise optical gratings that enablecoupling of light into and out of the CMOS chip 130. The gratingcouplers 117A-117D may be utilized to couple light received from opticalfibers into the CMOS chip 130, and the grating couplers 117E-117H may beutilized to couple light from the CMOS chip 130 into optical fibers. Thegrating couplers 117A-117H may comprise single polarization gratingcouplers (SPGC) and/or polarization splitting grating couplers (PSGC).In instances where a PSGC is utilized, two input, or output, waveguidesmay be utilized.

The optical fibers may be epoxied, for example, to the CMOS chip 130,and may be aligned at an angle from normal to the surface of the CMOSchip 130 to optimize coupling efficiency. In an embodiment of theinvention, the optical fibers may comprise single-mode fiber (SMF)and/or polarization-maintaining fiber (PMF).

In another exemplary embodiment, optical signals may be communicateddirectly into the surface of the CMOS chip 130 without optical fibers bydirecting a light source on an optical coupling device in the chip, suchas the light source interface 135 and/or the optical fiber interface139. This may be accomplished with directed laser sources and/or opticalsources on another chip flip-chip bonded to the CMOS chip 130.

The photodiodes 111A-111D may convert optical signals received from thegrating couplers 117A-117D into electrical signals that are communicatedto the amplifiers 107A-107D for processing. In another embodiment of theinvention, the photodiodes 111A-111D may comprise high-speedheterojunction phototransistors, for example, and may comprise germanium(Ge) in the collector and base regions for absorption in the 1.3-1.6 μmoptical wavelength range, and may be integrated on a CMOSsilicon-on-insulator (SOI) wafer.

The analog and digital control circuits 109 may control gain levels orother parameters in the operation of the amplifiers 107A-107D, which maythen communicate electrical signals off the CMOS chip 130. The controlsections 112A-112D comprise electronic circuitry that enable modulationof the CW laser signal received from the splitters 103A-103C. Theoptical modulators 105A-105D may require high-speed electrical signalsto modulate the refractive index in respective branches of aMach-Zehnder interferometer (MZI), for example. In an embodiment of theinvention, the control sections 112A-112D may include sink and/or sourcedriver electronics that may enable a bidirectional link utilizing asingle laser.

In operation, the CMOS chip 130 may be operable to transmit and/orreceive and process optical signals. Optical signals may be receivedfrom optical fibers and converted to electrical signals by thephotodetectors 111A-111D. The electrical signals may be amplified bytransimpedance amplifiers in the amplifiers 107A-107D, for example, andsubsequently communicated to other electronic circuitry, not shown, inthe CMOS chip 130. High impedance feedback in the transimpedanceamplifiers may enable optical sensitivity for low signal levels.Furthermore, the low impedance feedback may comprise feedback resistorsthat bias the transimpedance front end, shifting the low-frequencycutoff to higher frequencies.

In an embodiment of the invention, source follower circuits may beimplemented in the transimpedance feedback path to mitigate thelow-frequency cutoff shift from low impedance feedback. This mayeliminate the low frequency cutoff, and the source followers may beoperable to shift to ensure consistent bias points across theamplification stage.

Integrated photonics platforms allow the full functionality of anoptical transceiver to be integrated on a single chip, the CMOS chip130, for example. A transceiver chip comprises opto-electronic circuitsthat create and process the optical/electrical signals on thetransmitter (Tx) and the receiver (Rx) sides, as well as opticalinterfaces that couple the optical signal to and from one or more fiber.The signal processing functionality may comprise modulating the opticalcarrier, detecting the optical signal, splitting or combining datastreams, and multiplexing or demultiplexing data on carriers withdifferent wavelengths.

The light source may be external to the chip or may be integrated withthe chip in a hybrid scheme. It is often advantageous to have anexternal continuous-wave (CW) light source, because this architectureallows heat sinking and temperature control of the source separatelyfrom the transceiver chip 130. An external light source may also beconnected to the transceiver chip 130 via a fiber interface.

An integrated transceiver may comprise at least three opticalinterfaces, including a transmitter input port to interface to the CWlight source, labeled as CW Laser In 101; a transmitter output port tointerface to the fiber carrying the optical signal, labeled OpticalSignals Out; and a receiver input port to interface to the fibercarrying the optical signal, labeled Optical Signals In.

Waveguide photodetectors may be incorporated in integrated opticsplatforms, where several components are integrated together on a singlereceiver chip, as illustrated in FIG. 1A. In this platform, lightcouplers, such as the optical couplers 117A-117D, couple the opticalsignal from the fiber into optical waveguides 110. The optical signalsubsequently enters the waveguide detectors 111A-111D, where it isconverted to an electrical signal. In some embodiments, the coupler maycomprise a grating coupler, in which case the fiber is oriented in anear normal configuration to the chip 130 surface.

FIG. 1B is a diagram illustrating an exemplary CMOS chip, in accordancewith an embodiment of the invention. Referring to FIG. 1B, there isshown the CMOS chip 130 comprising electronic devices/circuits 131,optical and optoelectronic devices 133, a light source interface 135,CMOS chip front surface 137, an optical fiber interface 139, and CMOSguard ring 141.

The light source interface 135 and the optical fiber interface 139comprise grating couplers, for example, that enable coupling of lightsignals via the CMOS chip surface 137, as opposed to the edges of thechip as with conventional edge-emitting devices. Coupling light signalsvia the CMOS chip surface 137 enables the use of the CMOS guard ring 141which protects the chip mechanically and prevents the entry ofcontaminants via the chip edge.

The electronic devices/circuits 131 comprise circuitry such as theamplifiers 107A-107D and the analog and digital control circuits 109described with respect to FIG. 1A, for example. The optical andoptoelectronic devices 133 comprise devices such as the taps 103A-103K,optical terminations 115A-115D, grating couplers 117A-117H, opticalmodulators 105A-105D, high-speed heterojunction photodiodes 111A-111D,and monitor photodiodes 113A-113H.

In an embodiment of the invention, source follower circuits may beimplemented in the feedback path of transimpedance amplifiers in theelectronic devices/circuits 131 to mitigate the low-frequency cutoffshift from low impedance feedback. This may significantly reduce the lowfrequency cutoff, and the source followers may be operable to shiftvoltages to ensure consistent bias points across the amplificationstage.

FIG. 1C is a diagram illustrating an exemplary CMOS chip coupled to anoptical fiber cable, in accordance with an embodiment of the invention.Referring to FIG. 1C, there is shown the CMOS chip 130 comprising theCMOS chip surface 137, and the CMOS guard ring 141. There is also showna fiber-to-chip coupler 143, an optical fiber cable 145, and an opticalsource assembly 147.

The CMOS chip 130 comprising the electronic devices/circuits 131, theoptical and optoelectronic devices 133, the light source interface 135,the CMOS chip surface 137, and the CMOS guard ring 141 may be asdescribed with respect to FIG. 1B.

In an embodiment of the invention, the optical fiber cable may beaffixed, via epoxy for example, to the CMOS chip surface 137. The fiberchip coupler 143 enables the physical coupling of the optical fibercable 145 to the CMOS chip 130.

In an embodiment of the invention, source follower circuits may beimplemented in a feedback path of transimpedance amplifiers in theelectronic devices/circuits 131 to mitigate the low-frequency cutoffshift from low impedance feedback. This may significantly reduce the lowfrequency cutoff, and the source followers may be operable to shiftvoltages to ensure consistent bias points across the amplificationstage.

FIG. 2 is a block diagram of an exemplary transimpedance amplifier, inaccordance with an embodiment of the invention. Referring to FIG. 2,there is shown a transimpedance amplifier 200 comprising a photodetector201, detector bias resistors R_(D1) and R_(D2), coupling capacitors C₁and C₂, feedback resistors R_(FB1)-R_(FB4), a high impedance front end205, current mode logic (CML) stage 207, an offset compensation block209, a transmit (Tx) block 211, and an output resistance R_(o).

The photodetector 201 may comprise a semiconductor diode, for example,operable to convert received optical signals into electrical signals.The photodetector 201 may comprise a germanium/silicon-germanium diodeintegrated in the CMOS chip 130, for example. The bias resistors R_(D1)and R_(D2) may provide proper biasing conditions for the photodetector201. The high impedance front end 205 may comprise inverters withresistive feedback and may provide amplification for the electricalsignals received from the photodetector 201 via the coupling capacitorsC₁ and C₂.

The offset compensation block 209 may be integrated in the highimpedance feedback path for the transimpedance amplifier 200, and mayimprove performance by mitigating device impedance variation. The offsetcompensation 209 may comprise a differential amplifier 210 with RCfeedback elements R_(C1), C_(C1), R_(C2), and C_(C2) which may enablemitigation of offset DC voltages between the signals at the inputs tothe CML stage 207.

The Tx block 211 may comprise one or more gain stages that may beoperable to amplify signals received from the CML stage 207 forcommunication to other electronic circuits in the CMOS chip 130.

In operation, optical signals may be received by the photodetector 201and converted to electrical signals that may be AC-coupled to the highimpedance front end 205 via the coupling capacitors C₁ and C₂. TheAC-coupled electrical signals may then be amplified by the highimpedance front end 205 before being communicated to the CML stage 207.The high impedance feedback loop, comprising the feedback resistorsR_(FB1)-R_(FB4) and the offset compensation block 209, may enable lowsensitivity for the transimpedance amplifier 200, and the resistors maybias the high impedance front end 205.

Furthermore, since the feedback resistors R_(FB1)-R_(FB4) are betweenthe coupling capacitors and the CML stage 207 in this configuration, thelow-frequency cutoff may be high. This may be mitigated by coupling thefeedback resistors prior to the coupling capacitors C₁ and C₂, which isenabled by incorporating source followers in the feedback path, due totheir level-shifting capability.

FIG. 3 is a block diagram of an exemplary transimpedance amplifiercircuit with low-frequency cutoff mitigation, in accordance with anembodiment of the invention. Referring to FIG. 3, there is shown atransimpedance amplifier circuit 300 comprising a photodetector 301,detector bias resistors R_(D1) and R_(D2), coupling capacitors C₁ andC₂, feedback resistors R_(FB1) and R_(FB2), a bias resistor R_(B), atransimpedance amplifier 303, feedback source followers M₁ and M₂, and atransmit Tx block 305.

The photodetector 301, detector bias resistors R_(D1) and R_(D2),coupling capacitors C₁ and C₂, and the feedback resistors R_(FB1) andR_(FB2) may be substantially similar to the photodetector 201, detectorbias resistors R_(D1) and R_(D2), coupling capacitors C₁ and C₂, and thefeedback resistors R_(FB1) and R_(FB2) described with respect to FIG. 2.In an exemplary embodiment of the invention the feedback resistorsR_(FB1) and R_(FB2) may have resistance values of approximately 7 kΩ andthe bias resistor R_(B) may have a resistance value of approximately 2.5MΩ.

The transimpedance amplifier 303 may be operable to receive adifferential current signal and generate an amplified output voltagesignal that may be communicated to the Tx block 305. The transimpedanceamplifier 303 may comprise a high impedance feedback path comprising thesource followers M₁ and M₂ and the feedback resistors R_(FB1) andR_(FB2). The source followers M₁ and M₂ may comprise CMOS transistors,for example.

In operation, optical signals may be received by the photodetector 301and converted to electrical signals that may be AC-coupled to thetransimpedance amplifier 303 via the coupling capacitors C₁ and C₂. TheAC-coupled electrical signals may then be amplified by thetransimpedance amplifier 303 before being communicated to the Tx block305. The high impedance feedback loop, comprising the source followersM₁ and M₂ and the feedback resistors R_(FB1) and R_(FB2), may eliminateany low frequency cutoff issues and may also be operable to level shiftthe voltage levels at the coupling capacitors to ensure consistent biaspoints across the transimpedance amplifier circuit 300. Exemplaryperformance for such a circuit exhibits a low frequency cutoff of 20kHz, and a high-frequency cutoff of 6.6 GHz with a sensitivity of −26.8to −27.6 dB.

The invention is not limited to electrical signals received from aphotodetector, such as that shown in the exemplary embodiment of FIG. 3.Accordingly, the transimpedance amplifier circuit 300 may be utilized toamplify any electrical signals, irrespective of the source of thesignals, by communicating the electrical signals to the couplingcapacitors C₁ and C₂ without the use of a photodetector.

In an embodiment of the invention, a method and system are disclosed foramplifying electrical signals received via coupling capacitors C₁ and C₂utilizing a transimpedance amplifier (TIA) 303 having feedback pathscomprising source followers M₁ and M₂ and feedback resistors R_(FB1) andR_(FB2). The feedback paths may be coupled prior to the couplingcapacitors C₁ and C₂ at inputs of the TIA 303. Voltages may be levelshifted prior to the coupling capacitors C₁ and C₂ to ensure stable biasconditions for the TIA 303. The transimpedance amplifier 303 may beintegrated in a CMOS chip 130 and the source followers M₁ and M₂ maycomprise CMOS transistors. The TIA 303 may receive current-mode logic orvoltage signals. The electrical signals may be received from aphotodetector 301, which may comprise a silicon germanium photodiode andmay be differentially coupled to the transimpedance amplifier 303. Thechip may comprise a CMOS photonics chip 130 where optical signals forthe photodetector 301 in the CMOS photonics chip 130 may be received viaone or more optical fibers 145.

While the invention has been described with reference to certainembodiments, it will be understood by those skilled in the art thatvarious changes may be made and equivalents may be substituted withoutdeparting from the scope of the present invention. In addition, manymodifications may be made to adapt a particular situation or material tothe teachings of the present invention without departing from its scope.Therefore, it is intended that the present invention not be limited tothe particular embodiments disclosed, but that the present inventionwill include all embodiments falling within the scope of the appendedclaims.

We claim:
 1. A system, comprising: a transimpedance amplifier comprisingdifferential inputs and differential outputs; coupling capacitorscomprising input terminals configured to receive electrical signals, andoutput terminals coupled to the differential inputs; and feedback pathscoupled to the differential outputs and operable to level shift voltagelevels at the input terminals.
 2. The system of claim 1, wherein thefeedback paths comprise source follower transistors.
 3. The system ofclaim 2, wherein the differential outputs are coupled to gate terminalsof the source follower transistors.
 4. The system of claim 2, whereinthe feedback paths further comprise feedback resistors.
 5. The system ofclaim 1, further comprising: a bias resistor coupled between thedifferential inputs.
 6. The system of claim 1, wherein level shiftingthe voltage levels at the input terminals stabilizes bias conditions inthe transimpedance amplifier.
 7. The system of claim 1, furthercomprising: a photodetector differentially coupled to the transimpedanceamplifier, wherein the transimpedance amplifier receives electricalsignals from the photodetector at the differential inputs.
 8. Anamplifier, comprising: a gain stage comprising an input and an output; afeedback path including a source follower transistor having a gateterminal coupled to the output; and a coupling capacitor having a firstterminal coupled to the feedback path and a second terminal coupled tothe input.
 9. The amplifier of claim 8, wherein the gain stage isconfigured to amplify electrical signals received via the couplingcapacitor.
 10. The amplifier of claim 8, further comprising: a secondcoupling capacitor having a third terminal coupled to a second feedbackpath and a fourth terminal coupled to a second input of the gain stage,wherein the second feedback path includes a second source followertransistor having a second gate terminal coupled to a second output ofthe gain stage.
 11. The amplifier of claim 10, further comprising a biasresistor coupled between the input and the second input.
 12. Theamplifier of claim 8, further comprising a photodetector differentiallycoupled to the input and the second input.
 13. The amplifier of claim 8,wherein the source follower transistor is configured to level shiftvoltages prior to the coupling capacitor.
 14. The amplifier of claim 13,wherein level shifting the voltages stabilizes bias conditions in thegain stage.
 15. A method comprising: receiving, at a gain stage, a firstdifferential input from a first output terminal of a first couplingcapacitor and a second differential input from a second output terminalof a second coupling capacitor; amplifying the first differential inputto produce a first differential output and amplifying the seconddifferential input to produce a second differential output; and feedingthe first differential output back to a first input terminal of thefirst coupling capacitor as a first feedback signal and feeding thesecond differential output back to a second input terminal of the secondcoupling capacitor as a second feedback signal.
 16. The method of claim15, further comprising: adjusting a bias between the first differentialinput and the second differential input via a bias resistor coupledbetween the first output terminal and the second output terminal. 17.The method of claim 15, further comprising: level shifting a firstvoltage level of the first differential output via a source followertransistor that receives the first differential output at a gateterminal.
 18. The method of claim 17, further comprising: level shiftinga second voltage level of the second differential output via a secondsource follower transistor that receives the second differential outputat a second gate terminal.
 19. The method of claim 15, furthercomprising: receiving a first logic signal at the first input terminal;combining the first logic signal with the first feedback signal at thefirst input terminal to produce the first differential input; receivinga second logic signal at the second input terminal; and combining thesecond logic signal with the second feedback signal at the second inputterminal to produce the second differential input.
 20. The method ofclaim 19, wherein the first logic signal and the second logic signal arereceived from a photodetector differentially coupled to the gain stagevia the first coupling capacitor and the second coupling capacitor.